ALQU – Algorithms for quantum computer development in hardware-software codesign
Project duration: 1.10.2022 – 30.09.2026
We are developing customised compilation strategies for the DLR QCI’s quantum computers and customised quantum algorithms for difficult, industry-relevant computational problems.
We are building a 10-qubit quantum computer demonstrator based on ion trap technology with control software for remote access and, in a second step, automating operation and ensuring availability for applications at DLR.
This demonstrator for an ion trap quantum computer will contain at least ten fully functional qubits and will be available for applications at DLR at an early stage. It is the joint product of an industrial consortium: The quantum computer is based on a MAGIC quantum processor with ParityQC architecture. MAGIC stands for Magnetic Gradient Induced Coupling and enables the precise control of qubits using inexpensive and miniaturizable high-frequency technology. For this purpose, eleQtron builds the necessary hardware of the quantum processor. ParityQC develops an operating system and hardware-specific algorithms for the quantum computer. And NXP Semiconductors contributes the sensor solutions and the control and regulation electronics that are necessary for embedding in classic computers.
Motivation
The overarching goal of the consortium is to make innovations in quantum technologies socially usable and to transfer them to commercial applications. Stored ions are considered a promising and established approach in the race for a freely programmable and error-corrected quantum computer. The demonstrator provided by the consortium over the course of the project is based on an eleQtron prototype, which is being further developed, automated and made accessible via software interfaces for applications at DLR. The ParityQC architecture allows error-corrected quantum computers to be built thanks to its high parallelizability and modularizability. NXP brings its expertise in system electronics to the scaling of components.
Challenge
The quantum processor works according to the MAGIC method, in which all qubits are coupled to one another using magnetic field gradients. This method allows individual qubits to be controlled with high-frequency pulses in the microwave range, which means that commercial signal sources can be used. The ParityQC architecture allows algorithms to be developed efficiently on this processor to solve optimization problems from various application areas. NXP takes care of the adaptation of system electronics. After the project has been running for a year, the quantum computer will be delivered to the DLR Innovation Center in Hamburg. The demonstrator will be transferred to automated operation at the site and will then be available for applications at DLR.
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Objective
We are developing customised compilation strategies for the DLR QCI’s quantum computers and customised quantum algorithms for difficult, industry-relevant computational problems.
Through our research and development work, we support the quantum computing ecosystem in the development of innovative products and applications. In doing so, we focus on two particularly important problems in quantum software development – the efficient compilation of circuits on quantum computing hardware and the development of customised quantum algorithms for industrial use. We implement and evaluate our solutions for QCI quantum computers to take a step towards quantum advantage. In doing so, we work closely with quantum hardware manufacturers and industrial end users.
Motivation
For current quantum computers of the Noisy Intermediate-Scale Quantum (NISQ) era, no algorithms are yet known that have a guaranteed runtime improvement compared to classical computers. Although many of these algorithms do not require quantum error correction, precise knowledge of the errors is essential for achieving the quantum advantage. Therefore, implementing a useful application on a quantum computer faster than on a classical computer requires close cooperation in hardware and software development. In this way, the key figures and error models of the real machines can be incorporated into the algorithm development and, at the same time, the hardware development can implement the goals that are most promising in terms of algorithms and possible applications. This approach is called hardware-software codesign. In addition, a perspective orientation towards possible end users is essential to achieve the common goal – to solve a useful application faster on a quantum computer than on a classical computer. This is why our project bridges the gap between fundamental research and potential end users.
Challenge
It is not easy to find algorithms for error-prone quantum computers that promise a quantum advantage despite being error-prone. This is currently a key challenge. Above all, identifying practical tasks that are possible with current quantum-accelerated methods and their translation into a problem that can be solved by a quantum computer requires some knowledge and expertise. Due to the volatile development situation in the hardware sector, a high level of adaptability is also always necessary. This is why we must thoroughly investigate the applications and algorithms for possible uses. At the same time, we must not lose sight of alternative developments. It must always be clear that simply reproducing an application on a quantum computer Is not enough. Rather, the goal must always be to solve the application faster or better than with the best algorithms on conventional hardware.
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